[fedora-arm] F28 on odroid XU4

Post by Vince Geze
First of all I would like to thank all contributors for figuring out the
bits and pieces that make the F28 images bootable and functional on the
odroid XU4.
- network interface (r8152) is connected as USB2
- connecting USB3 devices seems to be hit or (mostly) miss, they are
detected by the xhci driver, but usually after they are already connected as
USB2

What kernel are you running? Are you running the GA kernel
(4.16.something?) or have you upgraded to the latest (4.17.x) as I
believe both of those issues were fixed in updates kernels.

Post by Vince Geze
- it seems like only the 4 A7 cores are active and switching to the 4 A15
cores is not possible

Hmm, what does lscpu report? Also what u-boot are you using? I'm not
100% sure here but I thought they were working, although with
big.little I'm not sure wthether they switch the whole cluster under
load or just bring more cpus online.

Post by Vince Geze
Since I noticed the Hardkernel Ubuntu image does correctly detect USB3, the
issue could not be purely related to hardware design or bus power, so I
decided to recompile (then) F28 kernel 4.17.11-200 with some alternative
config settings, compiling in lots of USB related modules. In the end I got
to the point where USB3 devices and the Ethernet chip indeed are detected as
USB3, some more fiddling also enabled all 8 cores simultaneously.
Attached you find the kernel-local used to modify the config, which still
can use some cleaning up.

I would need a diff against the fedora config because I don't have the
time to work out what's changed but a lot of stuff is built in by the
look of it and that's not going to happen in the upstream kernel, it's
also strange that it's needed since others have reported it works
fine, it of course could be a regression but the above changes work
around a regression not fix it. The Hardkernel group have never been
particularly upstream friendly so it's anyone's guess.

Post by Vince Geze
One point now remains, these adjustments require recompiling the kernel each
time an update is available, thus breaking an easy update path. Would there
be a way to achieve a similar result using initramfs and grub options?
Thanks in advance for your comments and feedback!

See above.
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Vince Geze

2018-08-22 14:55:49 UTC

Hi Peter,

-----Original Message-----
Sent: Wednesday, August 22, 2018 3:42 PM
Subject: Re: [fedora-arm] F28 on odroid XU4

Post by Vince Geze
First of all I would like to thank all contributors for figuring out
the bits and pieces that make the F28 images bootable and functional
on the odroid XU4.
- network interface (r8152) is connected as USB2
- connecting USB3 devices seems to be hit or (mostly) miss, they are
detected by the xhci driver, but usually after they are already connected as
USB2

What kernel are you running? Are you running the GA kernel
(4.16.something?) or have you upgraded to the latest (4.17.x) as I believe
both of those issues were fixed in updates kernels.

I noticed this with 4.16.3-301.fc28 included in the image, but there was the same behaviour with 4.17.11-200.fc28 and rawhide 4.18.0-0.rc7.git2.1.fc29. I have to say things indeed _do_ work with the default f28 kernels, you only notice the performance issue by checking the output of lsusb -t, dmesg or console when plugging in a USB3 device. My guess is there is some kind of race between the ehci/ohci and xhci modules, with the latter being loaded too slow or too late, because I do see detection messages for both USB2 and USB3 on the console, but usually USB2 comes first and USB3 after connection is established as USB2. Since r8152 is USB based, this probably is linked.

Post by Vince Geze
- it seems like only the 4 A7 cores are active and switching to the 4
A15 cores is not possible

Hmm, what does lscpu report? Also what u-boot are you using? I'm not 100%
sure here but I thought they were working, although with big.little I'm not
sure wthether they switch the whole cluster under load or just bring more
cpus online.

/proc/cpuinfo reports the 4 A7 cores, upon loading (load average>4) I can see these cores up in /sys/.../cpu[0-3], but the A15 cores cpu[4-7] don't seem to become active. Lscpu I don't know by heart, would need to check. The line " # CONFIG_BL_SWITCHER is not set" changes this to all 8 cores up all the time (exynos HMP). Again, the system works, but with reduced performance.
The u-boot is the one for odroid-xu3 in the fedora 28 image, cat of .bin and .dtb. Not sure if the cat is required.

Post by Vince Geze
Since I noticed the Hardkernel Ubuntu image does correctly detect
USB3, the issue could not be purely related to hardware design or bus
power, so I decided to recompile (then) F28 kernel 4.17.11-200 with
some alternative config settings, compiling in lots of USB related
modules. In the end I got to the point where USB3 devices and the
Ethernet chip indeed are detected as USB3, some more fiddling also

enabled all 8 cores simultaneously.

Post by Vince Geze
Attached you find the kernel-local used to modify the config, which
still can use some cleaning up.

I would need a diff against the fedora config because I don't have the time to
work out what's changed but a lot of stuff is built in by the look of it and
that's not going to happen in the upstream kernel, it's also strange that it's
needed since others have reported it works fine, it of course could be a
regression but the above changes work around a regression not fix it. The
Hardkernel group have never been particularly upstream friendly so it's
anyone's guess.

Post by Vince Geze
One point now remains, these adjustments require recompiling the
kernel each time an update is available, thus breaking an easy update
path. Would there be a way to achieve a similar result using initramfs and

grub options?

Post by Vince Geze
Thanks in advance for your comments and feedback!

See above.

Everything works, but some bits and pieces seem sub-optimal. Could anyone else check the output of `lsusb -t` on an odroid XU4 with stock fedora 28/29 kernel? I'm mostly interested in the USB stuff, if that is sorted out, I can easily evaluate cpu power. Maybe just A7 already does the trick.

The main difference between both kernel configs is built in vs module for USB related stuff, so this makes me wonder about modifying initramfs and/or grub instead of recompiling. Any suggestion to this end would be appreciated and can be tested quite fast.

Best regards,

Vince
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Peter Robinson

2018-08-22 15:03:36 UTC

Post by Vince Geze
First of all I would like to thank all contributors for figuring out
the bits and pieces that make the F28 images bootable and functional
on the odroid XU4.
- network interface (r8152) is connected as USB2
- connecting USB3 devices seems to be hit or (mostly) miss, they are
detected by the xhci driver, but usually after they are already connected as
USB2

What kernel are you running? Are you running the GA kernel
(4.16.something?) or have you upgraded to the latest (4.17.x) as I believe
both of those issues were fixed in updates kernels.

Post by Vince Geze
- it seems like only the 4 A7 cores are active and switching to the 4
A15 cores is not possible

Hmm, what does lscpu report? Also what u-boot are you using? I'm not 100%
sure here but I thought they were working, although with big.little I'm not
sure wthether they switch the whole cluster under load or just bring more
cpus online.

Post by Vince Geze
Since I noticed the Hardkernel Ubuntu image does correctly detect
USB3, the issue could not be purely related to hardware design or bus
power, so I decided to recompile (then) F28 kernel 4.17.11-200 with
some alternative config settings, compiling in lots of USB related
modules. In the end I got to the point where USB3 devices and the
Ethernet chip indeed are detected as USB3, some more fiddling also

enabled all 8 cores simultaneously.

Post by Vince Geze
Attached you find the kernel-local used to modify the config, which
still can use some cleaning up.

I would need a diff against the fedora config because I don't have the time to
work out what's changed but a lot of stuff is built in by the look of it and
that's not going to happen in the upstream kernel, it's also strange that it's
needed since others have reported it works fine, it of course could be a
regression but the above changes work around a regression not fix it. The
Hardkernel group have never been particularly upstream friendly so it's
anyone's guess.

Post by Vince Geze
One point now remains, these adjustments require recompiling the
kernel each time an update is available, thus breaking an easy update
path. Would there be a way to achieve a similar result using initramfs and

grub options?

Post by Vince Geze
Thanks in advance for your comments and feedback!

See above.

man 5 dracut.conf
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Vince Geze

2018-08-24 10:09:22 UTC

-----Original Message-----
Sent: Wednesday, August 22, 2018 5:04 PM
Subject: Re: [fedora-arm] F28 on odroid XU4

Post by Vince Geze
First of all I would like to thank all contributors for figuring
out the bits and pieces that make the F28 images bootable and
functional on the odroid XU4.
However, I noticed a couple of things after booting the F28 server
- network interface (r8152) is connected as USB2
- connecting USB3 devices seems to be hit or (mostly) miss, they
are detected by the xhci driver, but usually after they are
already connected as
USB2

What kernel are you running? Are you running the GA kernel
(4.16.something?) or have you upgraded to the latest (4.17.x) as I
believe both of those issues were fixed in updates kernels.

I noticed this with 4.16.3-301.fc28 included in the image, but there was the

same behaviour with 4.17.11-200.fc28 and rawhide 4.18.0-0.rc7.git2.1.fc29. I
have to say things indeed _do_ work with the default f28 kernels, you only
notice the performance issue by checking the output of lsusb -t, dmesg or
console when plugging in a USB3 device. My guess is there is some kind of
race between the ehci/ohci and xhci modules, with the latter being loaded
too slow or too late, because I do see detection messages for both USB2 and
USB3 on the console, but usually USB2 comes first and USB3 after connection
is established as USB2. Since r8152 is USB based, this probably is linked.

Post by Vince Geze
- it seems like only the 4 A7 cores are active and switching to the 4
A15 cores is not possible

/proc/cpuinfo reports the 4 A7 cores, upon loading (load average>4) I can

see these cores up in /sys/.../cpu[0-3], but the A15 cores cpu[4-7] don't
seem to become active. Lscpu I don't know by heart, would need to check.
The line " # CONFIG_BL_SWITCHER is not set" changes this to all 8 cores up all
the time (exynos HMP). Again, the system works, but with reduced
performance.

Post by Vince Geze
The u-boot is the one for odroid-xu3 in the fedora 28 image, cat of .bin and

.dtb. Not sure if the cat is required.

Post by Vince Geze
Since I noticed the Hardkernel Ubuntu image does correctly detect
USB3, the issue could not be purely related to hardware design or
bus power, so I decided to recompile (then) F28 kernel 4.17.11-200
with some alternative config settings, compiling in lots of USB
related modules. In the end I got to the point where USB3 devices
and the Ethernet chip indeed are detected as USB3, some more
fiddling also

enabled all 8 cores simultaneously.

Post by Vince Geze
Attached you find the kernel-local used to modify the config,
which still can use some cleaning up.

I would need a diff against the fedora config because I don't have
the time to work out what's changed but a lot of stuff is built in
by the look of it and that's not going to happen in the upstream
kernel, it's also strange that it's needed since others have
reported it works fine, it of course could be a regression but the
above changes work around a regression not fix it. The Hardkernel
group have never been particularly upstream friendly so it's anyone's

guess.

Post by Vince Geze
One point now remains, these adjustments require recompiling the
kernel each time an update is available, thus breaking an easy
update path. Would there be a way to achieve a similar result
using initramfs and

grub options?

Post by Vince Geze
Thanks in advance for your comments and feedback!

See above.

Everything works, but some bits and pieces seem sub-optimal. Could

anyone else check the output of `lsusb -t` on an odroid XU4 with stock fedora
28/29 kernel? I'm mostly interested in the USB stuff, if that is sorted out, I
can easily evaluate cpu power. Maybe just A7 already does the trick.

Post by Vince Geze
The main difference between both kernel configs is built in vs module for

USB related stuff, so this makes me wonder about modifying initramfs
and/or grub instead of recompiling. Any suggestion to this end would be
appreciated and can be tested quite fast.
man 5 dracut.conf

Well, after countless reboots it seems to be even more simple.
- USB3: preloading xhci-plat-hcd, which already is in the initramfs, is sufficient to get proper USB3 operation and the r8152 at full speed as well
- CPU HMP: this one I already knew was linked to the CONFIG_BL_SWITCHER. On [1] it is mentioned there are both sysfs and kernel boot options to control this behavior. The sysfs path exists and with lscpu you can see all 8 cores being put online. The kernel boot command however turned out to be incorrect, but after some digging I found you only need "no_bL_switcher" as boot option.

Since the board will be used headless, I also enabled the blinking led by preloading ledtrig-heartbeat, but this needs to be included in a /etc/dracut.conf.d/ conf file with 'add_drivers+=" ledtrig-heartbeat "'. The blinking frequency also gives an indication of the load.

The final boot line now looks like this:
append ro rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd root=UUID=your_UUID cpuidle.off=1 no_bL_switcher console=tty1 console=ttySAC2,115200n8

Result:
- systematically correct detection of USB3
- performance improvement by enabling all cpus
- indication whether the system is alive or not
- no need for recompiling kernels, only boot time options and an optional dracut inclusion

Best regards,

Vince

[1] https://wiki.linaro.org/projects/big.LITTLE.MP/Big.Little.Switcher/Docs/porting-guide
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Vince Geze

2018-08-24 12:17:24 UTC

-----Original Message-----
Sent: Friday, August 24, 2018 1:39 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4
--snip--

Post by Vince Geze
Well, after countless reboots it seems to be even more simple.
- USB3: preloading xhci-plat-hcd, which already is in the initramfs,
is sufficient to get proper USB3 operation and the r8152 at full speed
as well
- CPU HMP: this one I already knew was linked to the
CONFIG_BL_SWITCHER. On [1] it is mentioned there are both sysfs and
kernel boot options to control this behavior. The sysfs path exists
and with lscpu you can see all 8 cores being put online. The kernel
boot command however turned out to be incorrect, but after some
digging I found you only need "no_bL_switcher" as boot option.
Since the board will be used headless, I also enabled the blinking led
by preloading ledtrig-heartbeat, but this needs to be included in a
/etc/dracut.conf.d/ conf file with 'add_drivers+=" ledtrig-heartbeat
"'. The blinking frequency also gives an indication of the load.
append ro rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=your_UUID cpuidle.off=1 no_bL_switcher console=tty1
console=ttySAC2,115200n8
- systematically correct detection of USB3
- performance improvement by enabling all cpus
- indication whether the system is alive or not
- no need for recompiling kernels, only boot time options and an
optional dracut inclusion
Best regards,
Vince
[1]
https://wiki.linaro.org/projects/big.LITTLE.MP/Big.Little.Switcher/Doc
s/porting-guide

_______________________________________________

Post by Vince Geze
https://getfedora.org/code-of-conduct.html
https://fedoraproject.org/wiki/Mailing_list_guidelines
org/message/Y7EMT5B5HYSV3SX533YZZHOOEOMRHNFZ/

Hello Vince,
I must say thank you !
With your work I can enable all 8 CPUs on my Odroid HC1.
Architektur: armv7l
Byte-Reihenfolge: Little Endian
CPU(s): 8
Liste der Online-CPU(s): 0-3
Liste der Offline-CPU(s): 4-7
Thread(s) pro Kern: 1
Kern(e) pro Socket: 4
Sockel: 1
Architektur: armv7l
Byte-Reihenfolge: Little Endian
CPU(s): 8
Liste der Online-CPU(s): 0-7
Thread(s) pro Kern: 1
Kern(e) pro Socket: 4
Sockel: 2
Greetings
Andreas

Hi Andreas,

Glad to hear it's working on your side as well. Could you also check the
number at the end of the r8152 line in lsusb -t with the default boot line
without preloads? Is it 480M or 5000M?

Best regards,

Vince
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Vince Geze

2018-08-24 12:37:08 UTC

-----Original Message-----
Sent: Friday, August 24, 2018 2:27 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 1:39 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4
--snip--

the load.

Post by Vince Geze
append ro rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=your_UUID cpuidle.off=1 no_bL_switcher console=tty1
console=ttySAC2,115200n8
- systematically correct detection of USB3
- performance improvement by enabling all cpus
- indication whether the system is alive or not
- no need for recompiling kernels, only boot time options and an
optional dracut inclusion
Best regards,
Vince
[1]
https://wiki.linaro.org/projects/big.LITTLE.MP/Big.Little.Switcher/
Doc
s/porting-guide

_______________________________________________

Post by Vince Geze
https://getfedora.org/code-of-conduct.html
https://fedoraproject.org/wiki/Mailing_list_guidelines
org/message/Y7EMT5B5HYSV3SX533YZZHOOEOMRHNFZ/

/: Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class, Driver=r8152,

480M

/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
/: Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class, Driver=r8152,

480M

/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
Systems are identical: Odroid HC1 with update Fedora 28
Andreas

Hi Andreas,

Looks like the storage is working at USB3 speed, but the Ethernet at USB2.
Have you included the xhci preload at the modified boot line?

Best regards,

Vince
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Vince Geze

2018-08-24 13:15:06 UTC

-----Original Message-----
Sent: Friday, August 24, 2018 2:45 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 2:27 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 1:39 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4
--snip--

option.

Post by Vince Geze
Since the board will be used headless, I also enabled the
blinking led by preloading ledtrig-heartbeat, but this needs to
be included in a /etc/dracut.conf.d/ conf file with

'add_drivers+="

Post by Vince Geze
ledtrig-heartbeat "'. The blinking frequency also gives an indication

the load.

_______________________________________________

Post by Vince Geze
https://getfedora.org/code-of-conduct.html
https://fedoraproject.org/wiki/Mailing_list_guidelines
org/message/Y7EMT5B5HYSV3SX533YZZHOOEOMRHNFZ/

480M

/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
Systems are identical: Odroid HC1 with update Fedora 28
Andreas

Hi Andreas,
Looks like the storage is working at USB3 speed, but the Ethernet at USB2.
Have you included the xhci preload at the modified boot line?
Best regards,
Vince

generated by appliance-creator ui menu.c32 menu autoboot Welcome to
Fedora-Minimal-armhfp-28-1.1. Automatic boot in # second{,s}. Press a key
for options.
menu title Fedora-Minimal-armhfp-28-1.1 Boot Options.
menu hidden
timeout 20
totaltimeout 600
default=Fedora (4.17.14-202.fc28.armv7hl) 28 (Twenty Eight) label Fedora
(4.17.14-202.fc28.armv7hl) 28 (Twenty Eight)
kernel /vmlinuz-4.17.14-202.fc28.armv7hl
append ro rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=cf0c90a1-25e4-429b-a77e-b9b4f3802258 cpuidle.off=1
LANG=de_DE.UTF-8 no_bL_switcher console=tty1 console=ttySAC2,1152
00n8
fdtdir /dtb-4.17.14-202.fc28.armv7hl/
initrd /initramfs-4.17.14-202.fc28.armv7hl.img
I've edit this line with the older kernel before I updated the system this
kernel.
Andreas

Hi Andreas,

Have you removed power completely between reboots, meaning physically unplug
power at board side for 5-10 seconds such that all leds are dimmed? I have
the impression not every component is fully or correctly reset if you just
do an init 6. It would be quite interesting to know if that could be the
issue with the r8152 driver, since, except for the heartbeat, adding those
options to the original 4.16 kernel of the F28 image without any dracut
initramfs regeneration was sufficient on my device.

Best regards,

Vince
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Vince Geze

2018-08-27 08:41:59 UTC

-----Original Message-----
Sent: Saturday, August 25, 2018 11:50 AM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 2:45 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 2:27 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 1:39 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4
--snip--

option.

Post by Vince Geze
Since the board will be used headless, I also enabled the
blinking led by preloading ledtrig-heartbeat, but this needs to
be included in a /etc/dracut.conf.d/ conf file with

'add_drivers+="

Post by Vince Geze
ledtrig-heartbeat "'. The blinking frequency also gives an indication

the load.

_______________________________________________

Post by Vince Geze
https://getfedora.org/code-of-conduct.html
https://fedoraproject.org/wiki/Mailing_list_guidelines
org/message/Y7EMT5B5HYSV3SX533YZZHOOEOMRHNFZ/

480M

/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
Systems are identical: Odroid HC1 with update Fedora 28
Andreas

Hi Andreas,
Looks like the storage is working at USB3 speed, but the Ethernet at USB2.
Have you included the xhci preload at the modified boot line?
Best regards,
Vince

generated by appliance-creator ui menu.c32 menu autoboot Welcome to
Fedora-Minimal-armhfp-28-1.1. Automatic boot in # second{,s}. Press a
key for options.
menu title Fedora-Minimal-armhfp-28-1.1 Boot Options.
menu hidden
timeout 20
totaltimeout 600
default=Fedora (4.17.14-202.fc28.armv7hl) 28 (Twenty Eight) label Fedora
(4.17.14-202.fc28.armv7hl) 28 (Twenty Eight)
kernel /vmlinuz-4.17.14-202.fc28.armv7hl
append ro rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=cf0c90a1-25e4-429b-a77e-b9b4f3802258 cpuidle.off=1
LANG=de_DE.UTF-8 no_bL_switcher console=tty1 console=ttySAC2,1152
00n8
fdtdir /dtb-4.17.14-202.fc28.armv7hl/
initrd /initramfs-4.17.14-202.fc28.armv7hl.img
I've edit this line with the older kernel before I updated the system
this kernel.
Andreas

Hi Andreas,
Have you removed power completely between reboots, meaning

physically

Post by Vince Geze
unplug power at board side for 5-10 seconds such that all leds are
dimmed? I have the impression not every component is fully or
correctly reset if you just do an init 6. It would be quite
interesting to know if that could be the issue with the r8152 driver,
since, except for the heartbeat, adding those options to the original
4.16 kernel of the F28 image without any dracut initramfs regeneration was

sufficient on my device.

Post by Vince Geze
Best regards,
Vince

Hello Vince,
/: Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Vendor Specific Class, Driver=r8152, 5000M
/: Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
Linux odroidh2.reschke.lan 4.17.17-200.fc28.armv7hl #1 SMP Mon Aug 20
17:31:32 UTC 2018 armv7l armv7l armv7l GNU/Linux
Greetings
Andreas

Hi Andreas,

Thanks for the feedback, looks like both storage and Ethernet are connected as USB3 now.
Out of curiosity, are you running from SD or eMMC? I'm still using SD for testing, but once I got everything covered I'd like to switch to eMMC.

Best regards,

Vince
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Stewart Samuels

2018-08-28 18:29:09 UTC

Hello Vince,

I have used your input to get my Odorid Xu4 to both blink and use all 8
cores now.Â Thanks for the work you did to get that working. However,
unlike Andreas, my Driver r8152 still shows 480M.Â I am using the latest
4.17.18-200 kernel.Â See my output that follows:

Last login: Tue Aug 28 10:49:22 2018
[***@myodroid-wireless ~]#
[***@myodroid-wireless ~]#
[***@myodroid-wireless ~]# uname -a
Linux myodroid-wireless 4.17.18-200.fc28.armv7hl #1 SMP Wed Aug
22 20:36:45 UTC 2018 armv7l armv7l armv7l GNU/Linux
[***@myodroid-wireless ~]#
[***@myodroid-wireless ~]# lsusb -t
/:Â Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/:Â Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
Driver=r8152, 480M
/:Â Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 5000M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 4, If 0, Class=Hub, Driver=hub/4p,
5000M
/:Â Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 5, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 6, If 0, Class=Hub,
Driver=hub/4p, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 8, If 1, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 8, If 0, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â |__ Port 2: Dev 4, If 0, Class=Vendor Specific Class,
Driver=rtl8192cu, 480M
/:Â Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
/:Â Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p,
480M
[***@myodroid-wireless ~]#

Also, it looks that although 8 cores are now being used, the cpu
frequency is set to "ondemand" governor at 700 MHz.Â You can change that
to 1.3 GHz by changing the governor to "performance".Â But I is not
persistent between boots. Perhaps someone can provide some assistance in
how to make it persistent between boots.Â Anyway, here is what I did to
change the governor.

Â [***@myodroid-wireless ~]# cpupower frequency-info
analyzing CPU 0:
Â driver: cpufreq-dt
Â CPUs which run at the same hardware frequency: 0 1 2 3
Â CPUs which need to have their frequency coordinated by
software: 0 1 2 3
Â maximum transition latency: 154 us
Â hardware limits: 200 MHz - 1.30 GHz
Â available frequency steps:Â 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
Â current policy: frequency should be within 200 MHz and 1.30 GHz.
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â The governor "ondemand" may decide which
speed to use
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â within this range.
Â current CPU frequency: 700 MHz (asserted by call to hardware)
Â [***@myodroid-wireless ~]#
Â [***@myodroid-wireless ~]#
Â [***@myodroid-wireless ~]# cpupower frequency-info --governors
analyzing CPU 0:
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
[***@myodroid-wireless ~]# cpupower frequency-set --governor
performance
Setting cpu: 0
Setting cpu: 1
Setting cpu: 2
Setting cpu: 3
Setting cpu: 4
Setting cpu: 5
Setting cpu: 6
Setting cpu: 7
[***@myodroid-wireless ~]# cpupower frequency-info
analyzing CPU 0:
Â driver: cpufreq-dt
Â CPUs which run at the same hardware frequency: 0 1 2 3
Â CPUs which need to have their frequency coordinated by
software: 0 1 2 3
Â maximum transition latency: 154 us
Â hardware limits: 200 MHz - 1.30 GHz
Â available frequency steps:Â 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
Â current policy: frequency should be within 200 MHz and 1.30 GHz.
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â The governor "performance" may decide which
speed to use
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â within this range.
Â current CPU frequency: 1.30 GHz (asserted by call to hardware)

So, although we might be able to get to 1.30 GHz, the A15 Cortex
frequency is suppose to be 2.0 GHz and the A7 Cortex process 1.4 GHz.
Does anyone know if I am missing something here?Â I will check to see
what Ubuntu 18.04 for the Odroid XU4 and report back later.

Stewart

---snip---

Hello Vince,
/:Â Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
Â Â Â Â |__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
Driver=r8152, 5000M
/:Â Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/:Â Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
Â Â Â Â |__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 5000M
/:Â Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/:Â Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/:Â Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
Linux odroidh2.reschke.lan 4.17.17-200.fc28.armv7hl #1 SMP Mon Aug 20
17:31:32 UTC 2018 armv7l armv7l armv7l GNU/Linux
Greetings
Andreas

Hello Vince,
this system is running only with /boot from SD, all other filesystems
are on SSD.
I will now update my Odroid XU4, this should also work. I hope, I can
take this in the near future as my working place.
Greetings
Andreas
_______________________________________________
Fedora Code of Conduct: https://getfedora.org/code-of-conduct.html
List Guidelines: https://fedoraproject.org/wiki/Mailing_list_guidelines

Stewart Samuels

2018-08-28 20:59:06 UTC

Hello Vince,

Thanks for the work you've done to get 8 cores working on the
Odroid-XU4.Â Here is the output you asked of Andreas from my XU4 running
the latest fedora kernel:

[***@myodroid-wireless ~]# uname -a
Linux myodroid-wireless 4.17.18-200.fc28.armv7hl #1 SMP Wed Aug
22 20:36:45 UTC 2018 armv7l armv7l armv7l GNU/Linux
[***@myodroid-wireless ~]#
[***@myodroid-wireless ~]# lsusb -t
/:Â Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/:Â Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
Driver=r8152, 480M
/:Â Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 5000M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 4, If 0, Class=Hub, Driver=hub/4p,
5000M
/:Â Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 5, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 6, If 0, Class=Hub,
Driver=hub/4p, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 8, If 1, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 8, If 0, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â |__ Port 2: Dev 4, If 0, Class=Vendor Specific Class,
Driver=rtl8192cu, 480M
/:Â Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
/:Â Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p,
480M

Also, here is some other output of interest:

[***@myodroid-wireless ~]# cpupower frequency-info
analyzing CPU 0:
Â driver: cpufreq-dt
Â CPUs which run at the same hardware frequency: 0 1 2 3
Â CPUs which need to have their frequency coordinated by
software: 0 1 2 3
Â maximum transition latency: 154 us
Â hardware limits: 200 MHz - 1.30 GHz
Â available frequency steps:Â 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
Â current policy: frequency should be within 200 MHz and 1.30 GHz.
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â The governor "ondemand" may decide which
speed to use
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â within this range.
Â current CPU frequency: 700 MHz (asserted by call to hardware)

[***@myodroid-wireless ~]# cpupower frequency-info --governors
analyzing CPU 0:
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
[***@myodroid-wireless ~]# cpupower frequency-set --governor
performance
Setting cpu: 0
Setting cpu: 1
Setting cpu: 2
Setting cpu: 3
Setting cpu: 4
Setting cpu: 5
Setting cpu: 6
Setting cpu: 7
[***@myodroid-wireless ~]# cpupower frequency-info
analyzing CPU 0:
Â driver: cpufreq-dt
Â CPUs which run at the same hardware frequency: 0 1 2 3
Â CPUs which need to have their frequency coordinated by
software: 0 1 2 3
Â maximum transition latency: 154 us
Â hardware limits: 200 MHz - 1.30 GHz
Â available frequency steps:Â 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
Â current policy: frequency should be within 200 MHz and 1.30 GHz.
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â The governor "performance" may decide which
speed to use
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â within this range.
Â current CPU frequency: 1.30 GHz (asserted by call to hardware)

[***@myodroid-wireless ~]# lscpu
Architecture:Â Â Â Â Â Â Â armv7l
Byte Order:Â Â Â Â Â Â Â Â Â Little Endian
CPU(s):Â Â Â Â Â Â Â Â Â Â Â Â Â 8
On-line CPU(s) list: 0-7
Thread(s) per core:Â 1
Core(s) per socket:Â 4
Socket(s):Â Â Â Â Â Â Â Â Â Â 2
Vendor ID:Â Â Â Â Â Â Â Â Â Â ARM
Model:Â Â Â Â Â Â Â Â Â Â Â Â Â Â 3
Model name:Â Â Â Â Â Â Â Â Â Cortex-A7
Stepping:Â Â Â Â Â Â Â Â Â Â Â r0p3
CPU max MHz:Â Â Â Â Â Â Â Â 1800.0000
CPU min MHz:Â Â Â Â Â Â Â Â 200.0000
BogoMIPS:Â Â Â Â Â Â Â Â Â Â Â 78.00
Flags:Â Â Â Â Â Â Â Â Â Â Â Â Â Â half thumb fastmult vfp edsp thumbee neon
vfpv3 tls vfpv4 idiva idivt vfpd32 lpae

[***@myodroid-wireless ~]# dmesg
[Â Â Â 0.000000] Booting Linux on physical CPU 0x100
[Â Â Â 0.000000] Linux version 4.17.18-200.fc28.armv7hl
(***@buildvm-armv7-06.arm.fedoraproject.org) (gcc version
8.1.1 20180712 (Red Hat 8.1.1-5) (GCC)) #1 SMP Wed Aug 22
20:36:45 UTC 2018
[Â Â Â 0.000000] CPU: ARMv7 Processor [410fc073] revision 3
(ARMv7), cr=10c5387d
[Â Â Â 0.000000] CPU: div instructions available: patching
division code
[Â Â Â 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT
aliasing instruction cache
[Â Â Â 0.000000] OF: fdt: Machine model: Hardkernel Odroid XU4
[Â Â Â 0.000000] Memory policy: Data cache writealloc
[Â Â Â 0.000000] efi: Getting EFI parameters from FDT:
[Â Â Â 0.000000] efi: UEFI not found.
[Â Â Â 0.000000] cma: Reserved 192 MiB at 0xb2800000
[Â Â Â 0.000000] Samsung CPU ID: 0xe5422001
[Â Â Â 0.000000] On node 0 totalpages: 518656
[Â Â Â 0.000000]Â Â Normal zone: 1728 pages used for memmap
[Â Â Â 0.000000]Â Â Normal zone: 0 pages reserved
[Â Â Â 0.000000]Â Â Normal zone: 196608 pages, LIFO batch:31
[Â Â Â 0.000000]Â Â HighMem zone: 322048 pages, LIFO batch:31
[Â Â Â 0.000000] Running under secure firmware.
[Â Â Â 0.000000] random: fast init done
[Â Â Â 0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s34572
r8192 d22772 u65536
[Â Â Â 0.000000] pcpu-alloc: s34572 r8192 d22772 u65536 alloc=16*4096
[Â Â Â 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5
[0] 6 [0] 7
[Â Â Â 0.000000] Built 1 zonelists, mobility grouping on.Â Total
pages: 516928
[Â Â Â 0.000000] Kernel command line: ro
rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=d4a4b86d-5e86-4bcb-b79c-2bde6831b7c5 cma=192MB
cpuidle.off=1 LANG=en_US.UTF-8 no_bL_switcher
[Â Â Â 0.000000] Dentry cache hash table entries: 131072 (order:
7, 524288 bytes)
[Â Â Â 0.000000] Inode-cache hash table entries: 65536 (order: 6,
262144 bytes)
[Â Â Â 0.000000] Memory: 1822580K/2074624K available (8168K kernel
code, 1328K rwdata, 3920K rodata, 2048K init, 505K bss, 55436K
reserved, 196608K cma-reserved, 1091584K highmem)
[Â Â Â 0.000000] Virtual kernel memory layout:
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â vectorÂ : 0xffff0000 - 0xffff1000Â Â (Â Â 4 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â fixmapÂ : 0xffc00000 - 0xfff00000Â Â (3072 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â vmalloc : 0xf0800000 - 0xff800000Â Â ( 240 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â lowmemÂ : 0xc0000000 - 0xf0000000Â Â ( 768 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â pkmapÂ Â : 0xbfe00000 - 0xc0000000Â Â (Â Â 2 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â modules : 0xbf000000 - 0xbfe00000Â Â (Â 14 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .text : 0x(ptrval) - 0x(ptrval)Â Â (9161 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .init : 0x(ptrval) - 0x(ptrval)Â Â (2048 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .data : 0x(ptrval) - 0x(ptrval)Â Â (1329 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .bss : 0x(ptrval) - 0x(ptrval)Â Â ( 506 kB)
[Â Â Â 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0,
CPUs=8, Nodes=1
[Â Â Â 0.000000] ftrace: allocating 37441 entries in 74 pages
[Â Â Â 0.000000] Hierarchical RCU implementation.
[Â Â Â 0.000000] Â Â Â RCU restricting CPUs from NR_CPUS=32 to
nr_cpu_ids=8.
[Â Â Â 0.000000] Â Â Â Tasks RCU enabled.
[Â Â Â 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16,
nr_cpu_ids=8
[Â Â Â 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[Â Â Â 0.000000] GIC: Using split EOI/Deactivate mode
[Â Â Â 0.000000] GIC physical location is 0x10481000
[Â Â Â 0.000000] Switching to timer-based delay loop, resolution 41ns
[Â Â Â 0.000000] clocksource: mct-frc: mask: 0xffffffff
max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[Â Â Â 0.000007] sched_clock: 32 bits at 24MHz, resolution 41ns,
wraps every 89478484971ns
[Â Â Â 0.000033] genirq: irq_chip COMBINER did not update eff.
affinity mask of irq 49
[Â Â Â 0.006905] Console: colour dummy device 80x30
[Â Â Â 0.007535] console [tty0] enabled
[Â Â Â 0.007603] Calibrating delay loop (skipped), value
calculated using timer frequency.. 48.00 BogoMIPS (lpj=24000)
[Â Â Â 0.007640] pid_max: default: 32768 minimum: 301
[Â Â Â 0.007903] Security Framework initialized
[Â Â Â 0.007927] Yama: becoming mindful.
[Â Â Â 0.007994] SELinux:Â Initializing.
[Â Â Â 0.008199] SELinux:Â Starting in permissive mode
[Â Â Â 0.008297] Mount-cache hash table entries: 2048 (order: 1,
8192 bytes)
[Â Â Â 0.008335] Mountpoint-cache hash table entries: 2048 (order:
1, 8192 bytes)
[Â Â Â 0.009575] CPU: Testing write buffer coherency: ok
[Â Â Â 0.010559] CPU0: thread -1, cpu 0, socket 1, mpidr 80000100
[Â Â Â 0.011506] Setting up static identity map for 0x40300000 -
0x403000a0
[Â Â Â 0.012297] ARM CCI driver probed
[Â Â Â 0.012546] Exynos MCPM support installed
[Â Â Â 0.015526] Hierarchical SRCU implementation.
[Â Â Â 0.022460] EFI services will not be available.
[Â Â Â 0.023397] smp: Bringing up secondary CPUs ...
[Â Â Â 0.024680] CPU1: thread -1, cpu 1, socket 1, mpidr 80000101
[Â Â Â 0.026094] CPU2: thread -1, cpu 2, socket 1, mpidr 80000102
[Â Â Â 0.027452] CPU3: thread -1, cpu 3, socket 1, mpidr 80000103
[Â Â Â 0.028759] CPU4: thread -1, cpu 0, socket 0, mpidr 80000000
[Â Â Â 0.030181] CPU5: thread -1, cpu 1, socket 0, mpidr 80000001
[Â Â Â 0.031561] CPU6: thread -1, cpu 2, socket 0, mpidr 80000002
[Â Â Â 0.032919] CPU7: thread -1, cpu 3, socket 0, mpidr 80000003
[Â Â Â 0.033125] smp: Brought up 1 node, 8 CPUs
[Â Â Â 0.033262] SMP: Total of 8 processors activated (384.00
BogoMIPS).
[Â Â Â 0.033284] CPU: WARNING: CPU(s) started in
wrong/inconsistent modes (primary CPU mode 0x1a)
[Â Â Â 0.033309] CPU: This may indicate a broken bootloader or
firmware.

Note the following:

* Although 8 cores are recognized, the "lscpu" command (and the
"dmesg" snippet) recognizes only the A7 processor.
* The default cpu governor is "ondemand" providing a cpu frequency of
700 MHz for all cores per the output of the first "cpupower
frequency-info" above.
* The cpu governor and frequency can be changed to "performance" and
1300 MHz, respectively by using the command "cpupower frequency-set
--governor performance", but this is not persistent between
reboots.Â To make it persistent between reboots follow this
procedure:
https://ask.fedoraproject.org/en/question/39964/how-to-permanently-set-cpu-power-management-to-the-powersave-governor
* Note the last two lines in the "dmesg" command.Â There may be
additional code required in the bootloader or firmware to recognize
the A15 processor correctly.Â Does anyone have any ideas here?

Stewart

-----Original Message-----
Sent: Saturday, August 25, 2018 11:50 AM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 2:45 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 2:27 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4

-----Original Message-----
Sent: Friday, August 24, 2018 1:39 PM
Subject: Re: [fedora-arm] Re: F28 on odroid XU4
--snip--

option.

Post by Vince Geze
Since the board will be used headless, I also enabled the
blinking led by preloading ledtrig-heartbeat, but this needs to
be included in a /etc/dracut.conf.d/ conf file with

'add_drivers+="

Post by Vince Geze
ledtrig-heartbeat "'. The blinking frequency also gives an indication

the load.

_______________________________________________

Post by Vince Geze
https://getfedora.org/code-of-conduct.html
https://fedoraproject.org/wiki/Mailing_list_guidelines
org/message/Y7EMT5B5HYSV3SX533YZZHOOEOMRHNFZ/

480M

/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
|__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
Systems are identical: Odroid HC1 with update Fedora 28
Andreas

Hi Andreas,
Looks like the storage is working at USB3 speed, but the Ethernet at USB2.
Have you included the xhci preload at the modified boot line?
Best regards,
Vince

generated by appliance-creator ui menu.c32 menu autoboot Welcome to
Fedora-Minimal-armhfp-28-1.1. Automatic boot in # second{,s}. Press a
key for options.
menu title Fedora-Minimal-armhfp-28-1.1 Boot Options.
menu hidden
timeout 20
totaltimeout 600
default=Fedora (4.17.14-202.fc28.armv7hl) 28 (Twenty Eight) label Fedora
(4.17.14-202.fc28.armv7hl) 28 (Twenty Eight)
kernel /vmlinuz-4.17.14-202.fc28.armv7hl
append ro rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=cf0c90a1-25e4-429b-a77e-b9b4f3802258 cpuidle.off=1
LANG=de_DE.UTF-8 no_bL_switcher console=tty1 console=ttySAC2,1152
00n8
fdtdir /dtb-4.17.14-202.fc28.armv7hl/
initrd /initramfs-4.17.14-202.fc28.armv7hl.img
I've edit this line with the older kernel before I updated the system
this kernel.
Andreas

Hi Andreas,
Have you removed power completely between reboots, meaning

physically

sufficient on my device.

Post by Vince Geze
Best regards,
Vince

Vince Geze

2018-08-29 12:17:25 UTC

Hello Vince,
Thanks for the work you've done to get 8 cores working on the
Odroid-XU4. Here is the output you asked of Andreas from my XU4 running
Linux myodroid-wireless 4.17.18-200.fc28.armv7hl #1 SMP Wed Aug
22 20:36:45 UTC 2018 armv7l armv7l armv7l GNU/Linux
/: Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
Driver=r8152, 480M
/: Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
        |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 5000M
            |__ Port 1: Dev 4, If 0, Class=Hub, Driver=hub/4p,
5000M
/: Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
        |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 480M
            |__ Port 1: Dev 5, If 0, Class=Hub, Driver=hub/4p, 480M
                |__ Port 2: Dev 6, If 0, Class=Hub,
Driver=hub/4p, 12M
                    |__ Port 4: Dev 9, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
                    |__ Port 4: Dev 9, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
                    |__ Port 4: Dev 9, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
                    |__ Port 2: Dev 8, If 1, Class=Wireless,
Driver=btusb, 12M
                    |__ Port 2: Dev 8, If 0, Class=Wireless,
Driver=btusb, 12M
                    |__ Port 1: Dev 7, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
                    |__ Port 1: Dev 7, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
                    |__ Port 1: Dev 7, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
        |__ Port 2: Dev 4, If 0, Class=Vendor Specific Class,
Driver=rtl8192cu, 480M
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p,
480M
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1 2 3
CPUs which need to have their frequency coordinated by
software: 0 1 2 3
maximum transition latency: 154 us
hardware limits: 200 MHz - 1.30 GHz
available frequency steps: 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
current policy: frequency should be within 200 MHz and 1.30 GHz.
                  The governor "ondemand" may decide which
speed to use
                  within this range.
current CPU frequency: 700 MHz (asserted by call to hardware)
available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
performance
Setting cpu: 0
Setting cpu: 1
Setting cpu: 2
Setting cpu: 3
Setting cpu: 4
Setting cpu: 5
Setting cpu: 6
Setting cpu: 7
driver: cpufreq-dt
CPUs which run at the same hardware frequency: 0 1 2 3
CPUs which need to have their frequency coordinated by
software: 0 1 2 3
maximum transition latency: 154 us
hardware limits: 200 MHz - 1.30 GHz
available frequency steps: 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
current policy: frequency should be within 200 MHz and 1.30 GHz.
                  The governor "performance" may decide which
speed to use
                  within this range.
current CPU frequency: 1.30 GHz (asserted by call to hardware)
Architecture:        armv7l
Byte Order:          Little Endian
CPU(s):              8
On-line CPU(s) list: 0-7
Thread(s) per core: 1
Core(s) per socket: 4
Socket(s):           2
Vendor ID:           ARM
Model:               3
Model name:          Cortex-A7
Stepping:            r0p3
CPU max MHz:         1800.0000
CPU min MHz:         200.0000
BogoMIPS:            78.00
Flags:               half thumb fastmult vfp edsp thumbee neon
vfpv3 tls vfpv4 idiva idivt vfpd32 lpae
[    0.000000] Booting Linux on physical CPU 0x100
[    0.000000] Linux version 4.17.18-200.fc28.armv7hl
(mockbuild(a)buildvm-armv7-06.arm.fedoraproject.org) (gcc version
8.1.1 20180712 (Red Hat 8.1.1-5) (GCC)) #1 SMP Wed Aug 22
20:36:45 UTC 2018
[    0.000000] CPU: ARMv7 Processor [410fc073] revision 3
(ARMv7), cr=10c5387d
[    0.000000] CPU: div instructions available: patching
division code
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT
aliasing instruction cache
[    0.000000] OF: fdt: Machine model: Hardkernel Odroid XU4
[    0.000000] Memory policy: Data cache writealloc
[    0.000000] efi: UEFI not found.
[    0.000000] cma: Reserved 192 MiB at 0xb2800000
[    0.000000] Samsung CPU ID: 0xe5422001
[    0.000000] On node 0 totalpages: 518656
[    0.000000]   Normal zone: 1728 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 196608 pages, LIFO batch:31
[    0.000000]   HighMem zone: 322048 pages, LIFO batch:31
[    0.000000] Running under secure firmware.
[    0.000000] random: fast init done
r8192 d22772 u65536
[    0.000000] pcpu-alloc: s34572 r8192 d22772 u65536 alloc=16*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5
[0] 6 [0] 7
[    0.000000] Built 1 zonelists, mobility grouping on. Total
pages: 516928
[    0.000000] Kernel command line: ro
rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=d4a4b86d-5e86-4bcb-b79c-2bde6831b7c5 cma=192MB
cpuidle.off=1 LANG=en_US.UTF-8 no_bL_switcher
7, 524288 bytes)
[    0.000000] Inode-cache hash table entries: 65536 (order: 6,
262144 bytes)
[    0.000000] Memory: 1822580K/2074624K available (8168K kernel
code, 1328K rwdata, 3920K rodata, 2048K init, 505K bss, 55436K
reserved, 196608K cma-reserved, 1091584K highmem)
                   vector : 0xffff0000 - 0xffff1000   (   4 kB)
                   fixmap : 0xffc00000 - 0xfff00000   (3072 kB)
                   vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
                   lowmem : 0xc0000000 - 0xf0000000   ( 768 MB)
                   pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
                   modules : 0xbf000000 - 0xbfe00000   ( 14 MB)
                     .text : 0x(ptrval) - 0x(ptrval)   (9161 kB)
                     .init : 0x(ptrval) - 0x(ptrval)   (2048 kB)
                     .data : 0x(ptrval) - 0x(ptrval)   (1329 kB)
                      .bss : 0x(ptrval) - 0x(ptrval)   ( 506 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0,
CPUs=8, Nodes=1
[    0.000000] ftrace: allocating 37441 entries in 74 pages
[    0.000000] Hierarchical RCU implementation.
[    0.000000]     RCU restricting CPUs from NR_CPUS=32 to
nr_cpu_ids=8.
[    0.000000]     Tasks RCU enabled.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16,
nr_cpu_ids=8
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] GIC: Using split EOI/Deactivate mode
[    0.000000] GIC physical location is 0x10481000
[    0.000000] Switching to timer-based delay loop, resolution 41ns
[    0.000000] clocksource: mct-frc: mask: 0xffffffff
max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[    0.000007] sched_clock: 32 bits at 24MHz, resolution 41ns,
wraps every 89478484971ns
[    0.000033] genirq: irq_chip COMBINER did not update eff.
affinity mask of irq 49
[    0.006905] Console: colour dummy device 80x30
[    0.007535] console [tty0] enabled
[    0.007603] Calibrating delay loop (skipped), value
calculated using timer frequency.. 48.00 BogoMIPS (lpj=24000)
[    0.007640] pid_max: default: 32768 minimum: 301
[    0.007903] Security Framework initialized
[    0.007927] Yama: becoming mindful.
[    0.007994] SELinux: Initializing.
[    0.008199] SELinux: Starting in permissive mode
[    0.008297] Mount-cache hash table entries: 2048 (order: 1,
8192 bytes)
1, 8192 bytes)
[    0.009575] CPU: Testing write buffer coherency: ok
[    0.010559] CPU0: thread -1, cpu 0, socket 1, mpidr 80000100
[    0.011506] Setting up static identity map for 0x40300000 -
0x403000a0
[    0.012297] ARM CCI driver probed
[    0.012546] Exynos MCPM support installed
[    0.015526] Hierarchical SRCU implementation.
[    0.022460] EFI services will not be available.
[    0.023397] smp: Bringing up secondary CPUs ...
[    0.024680] CPU1: thread -1, cpu 1, socket 1, mpidr 80000101
[    0.026094] CPU2: thread -1, cpu 2, socket 1, mpidr 80000102
[    0.027452] CPU3: thread -1, cpu 3, socket 1, mpidr 80000103
[    0.028759] CPU4: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.030181] CPU5: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.031561] CPU6: thread -1, cpu 2, socket 0, mpidr 80000002
[    0.032919] CPU7: thread -1, cpu 3, socket 0, mpidr 80000003
[    0.033125] smp: Brought up 1 node, 8 CPUs
[    0.033262] SMP: Total of 8 processors activated (384.00
BogoMIPS).
[    0.033284] CPU: WARNING: CPU(s) started in
wrong/inconsistent modes (primary CPU mode 0x1a)
[    0.033309] CPU: This may indicate a broken bootloader or
firmware.
* Although 8 cores are recognized, the "lscpu" command (and the
"dmesg" snippet) recognizes only the A7 processor.
* The default cpu governor is "ondemand" providing a cpu frequency of
700 MHz for all cores per the output of the first "cpupower
frequency-info" above.
* The cpu governor and frequency can be changed to "performance" and
1300 MHz, respectively by using the command "cpupower frequency-set
--governor performance", but this is not persistent between
reboots. To make it persistent between reboots follow this
https://ask.fedoraproject.org/en/question/39964/how-to-permanently-set-cp...
* Note the last two lines in the "dmesg" command. There may be
additional code required in the bootloader or firmware to recognize
the A15 processor correctly. Does anyone have any ideas here?
Stewart

Hi Stewart,

I don't think lscpu is the best source of cpu related info on this device. You can have a look at the /sys tree, I'm not at my device now but I think it's /sys/bus/cpu. There should be a lot of files with cpu related info there, probably even with the correct core type a7/a15. The system boots on an a7 core, so that's probably what you see with lscpu and dmesg. Not sure about the cpu mode, my guess it's related to kernel and user cpu modes, with the cpu not enabled in the mode the bootloader expects.
The frequency/voltage pairs in dts are limited to 1.3/1.8GHz, so that's the maximum we get for now. I seem to remember frequencies being downscaled from 1.4/2.1GHz, but I'm not sure what was the background.
That being said, when looking at the "current frequency" in /sys, I have the impression the default ondemand governor is behaving as expected, scaling frequency up and down depending on load. Maybe you can try monitoring those files as well? I'll have a look when I have access to the device again.
Regarding the r8152 driver, did you just reboot after making the kernel option changes, or shutdown and remove power completely? The first seems to retain part of the old config, the latter will be a full reset and should behave correctly.

Best regards,

Vince
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Stewart Samuels

2018-08-30 02:59:24 UTC

Hello Vince,

FYi.Â I can now confirm that removing and reinserting the power plug
does in fact change the value of the r8152 driver value as follows:

[***@myodroid-wireless devices]# lsusb -t
/:Â Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
Driver=r8152, 5000M
/:Â Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
/:Â Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 5000M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 4, If 0, Class=Hub, Driver=hub/4p, 5000M
/:Â Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 5, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 14, If 0, Class=Vendor Specific
Class, Driver=, 480M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 6, If 0, Class=Hub, Driver=hub/4p, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 12, If 2, Class=Human Interface
Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 12, If 0, Class=Human Interface
Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 12, If 1, Class=Human Interface
Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 11, If 1, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 11, If 0, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 13, If 2, Class=Human Interface
Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 13, If 0, Class=Human Interface
Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 13, If 1, Class=Human Interface
Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 15, If 0, Class=Mass Storage,
Driver=usb-storage, 480M
Â Â Â Â Â Â Â |__ Port 2: Dev 4, If 0, Class=Vendor Specific Class,
Driver=rtl8192cu, 480M
/:Â Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p, 480M
/:Â Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M

Interestingly, shutting down the system and powering it off via and
extension cord switch had not effected the change.Â But complete removal
and restoration of the power cord into the chassis results in the output
above.

Also, the "lscpu -a -e" command provides the following:

[***@myodroid-wireless devices]# lscpu -a -e
CPU SOCKET CORE ONLINE MAXMHZÂ Â Â MINMHZ
0Â Â 0Â Â Â Â Â 0Â Â Â yesÂ Â Â 1300.0000 200.0000
1Â Â 0Â Â Â Â Â 1Â Â Â yesÂ Â Â 1300.0000 200.0000
2Â Â 0Â Â Â Â Â 2Â Â Â yesÂ Â Â 1300.0000 200.0000
3Â Â 0Â Â Â Â Â 3Â Â Â yesÂ Â Â 1300.0000 200.0000
4Â Â 1Â Â Â Â Â 4Â Â Â yesÂ Â Â 1800.0000 200.0000
5Â Â 1Â Â Â Â Â 5Â Â Â yesÂ Â Â 1800.0000 200.0000
6Â Â 1Â Â Â Â Â 6Â Â Â yesÂ Â Â 1800.0000 200.0000
7Â Â 1Â Â Â Â Â 7Â Â Â yesÂ Â Â 1800.0000 200.0000

Note, cpu 0 (cores 0-3) aligns with the Cortex A7 processor and cpu 1
(cores 4-7) aligns with the Cortex A15 processor.Â Although "dmesg" does
not specifically identify the A15 Processor, the system does in fact
recognize it, as can be seen in /sys/devices as follows:

[***@myodroid-wireless devices]# pwd
/sys/devices
[***@myodroid-wireless devices]# ls -l
total 0
drwxr-xr-xÂ 5 root root 0 Aug 29 19:20 armv7_cortex_a15
drwxr-xr-xÂ 5 root root 0 Aug 29 19:20 armv7_cortex_a7
drwxr-xr-xÂ 3 root root 0 Aug 29 19:20 breakpoint
drwxr-xr-xÂ 4 root root 0 Aug 29 19:20 kprobe
drwxr-xr-x 24 root root 0 Aug 29 14:01 platform
drwxr-xr-xÂ 3 root root 0 Aug 29 19:20 software
drwxr-xr-xÂ 7 root root 0 Aug 29 19:20 system
drwxr-xr-xÂ 3 root root 0 Aug 29 19:20 tracepoint
drwxr-xr-xÂ 4 root root 0 Aug 29 19:20 uprobe
drwxr-xr-x 16 root root 0 Aug 29 19:20 virtual

The cpus associated with the armv7_cortex_a15 can indeed be seen in the
file "cpus" under the armv7_cortex_a15 directory and align perfectly
with the output from the "lscpu -a -e" command.Â So it would seem the
"lscpu" command does report as expected.

Thanks again for your work on this.

Â Â Â Â Â Â Â Â Stewart

Hello Vince,
Thanks for the work you've done to get 8 cores working on the
Odroid-XU4.Â Here is the output you asked of Andreas from my XU4 running
Linux myodroid-wireless 4.17.18-200.fc28.armv7hl #1 SMP Wed Aug
22 20:36:45 UTC 2018 armv7l armv7l armv7l GNU/Linux
/:Â Bus 06.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/:Â Bus 05.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Vendor Specific Class,
Driver=r8152, 480M
/:Â Bus 04.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 5000M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 5000M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 4, If 0, Class=Hub, Driver=hub/4p,
5000M
/:Â Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
Â Â Â |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/2p, 480M
Â Â Â Â Â Â Â |__ Port 1: Dev 3, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 5, If 0, Class=Hub, Driver=hub/4p, 480M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 6, If 0, Class=Hub,
Driver=hub/4p, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 4: Dev 9, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 8, If 1, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 2: Dev 8, If 0, Class=Wireless,
Driver=btusb, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 2, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 0, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â |__ Port 1: Dev 7, If 1, Class=Human
Interface Device, Driver=usbhid, 12M
Â Â Â Â Â Â Â |__ Port 2: Dev 4, If 0, Class=Vendor Specific Class,
Driver=rtl8192cu, 480M
/:Â Bus 02.Port 1: Dev 1, Class=root_hub, Driver=exynos-ohci/3p, 12M
/:Â Bus 01.Port 1: Dev 1, Class=root_hub, Driver=exynos-ehci/3p,
480M
Â driver: cpufreq-dt
Â CPUs which run at the same hardware frequency: 0 1 2 3
Â CPUs which need to have their frequency coordinated by
software: 0 1 2 3
Â maximum transition latency: 154 us
Â hardware limits: 200 MHz - 1.30 GHz
Â available frequency steps:Â 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
Â current policy: frequency should be within 200 MHz and 1.30 GHz.
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â The governor "ondemand" may decide which
speed to use
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â within this range.
Â current CPU frequency: 700 MHz (asserted by call to hardware)
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
performance
Setting cpu: 0
Setting cpu: 1
Setting cpu: 2
Setting cpu: 3
Setting cpu: 4
Setting cpu: 5
Setting cpu: 6
Setting cpu: 7
Â driver: cpufreq-dt
Â CPUs which run at the same hardware frequency: 0 1 2 3
Â CPUs which need to have their frequency coordinated by
software: 0 1 2 3
Â maximum transition latency: 154 us
Â hardware limits: 200 MHz - 1.30 GHz
Â available frequency steps:Â 200 MHz, 300 MHz, 400 MHz, 500
MHz, 600 MHz, 700 MHz, 800 MHz, 900 MHz, 1000 MHz, 1.10 GHz,
1.20 GHz, 1.30 GHz
Â available cpufreq governors: conservative userspace powersave
ondemand performance schedutil
Â current policy: frequency should be within 200 MHz and 1.30 GHz.
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â The governor "performance" may decide which
speed to use
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â within this range.
Â current CPU frequency: 1.30 GHz (asserted by call to hardware)
Architecture:Â Â Â Â Â Â Â armv7l
Byte Order:Â Â Â Â Â Â Â Â Â Little Endian
CPU(s):Â Â Â Â Â Â Â Â Â Â Â Â Â 8
On-line CPU(s) list: 0-7
Thread(s) per core:Â 1
Core(s) per socket:Â 4
Socket(s):Â Â Â Â Â Â Â Â Â Â 2
Vendor ID:Â Â Â Â Â Â Â Â Â Â ARM
Model:Â Â Â Â Â Â Â Â Â Â Â Â Â Â 3
Model name:Â Â Â Â Â Â Â Â Â Cortex-A7
Stepping:Â Â Â Â Â Â Â Â Â Â Â r0p3
CPU max MHz:Â Â Â Â Â Â Â Â 1800.0000
CPU min MHz:Â Â Â Â Â Â Â Â 200.0000
BogoMIPS:Â Â Â Â Â Â Â Â Â Â Â 78.00
Flags:Â Â Â Â Â Â Â Â Â Â Â Â Â Â half thumb fastmult vfp edsp thumbee neon
vfpv3 tls vfpv4 idiva idivt vfpd32 lpae
[Â Â Â 0.000000] Booting Linux on physical CPU 0x100
[Â Â Â 0.000000] Linux version 4.17.18-200.fc28.armv7hl
(mockbuild(a)buildvm-armv7-06.arm.fedoraproject.org) (gcc version
8.1.1 20180712 (Red Hat 8.1.1-5) (GCC)) #1 SMP Wed Aug 22
20:36:45 UTC 2018
[Â Â Â 0.000000] CPU: ARMv7 Processor [410fc073] revision 3
(ARMv7), cr=10c5387d
[Â Â Â 0.000000] CPU: div instructions available: patching
division code
[Â Â Â 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT
aliasing instruction cache
[Â Â Â 0.000000] OF: fdt: Machine model: Hardkernel Odroid XU4
[Â Â Â 0.000000] Memory policy: Data cache writealloc
[Â Â Â 0.000000] efi: UEFI not found.
[Â Â Â 0.000000] cma: Reserved 192 MiB at 0xb2800000
[Â Â Â 0.000000] Samsung CPU ID: 0xe5422001
[Â Â Â 0.000000] On node 0 totalpages: 518656
[Â Â Â 0.000000]Â Â Normal zone: 1728 pages used for memmap
[Â Â Â 0.000000]Â Â Normal zone: 0 pages reserved
[Â Â Â 0.000000]Â Â Normal zone: 196608 pages, LIFO batch:31
[Â Â Â 0.000000]Â Â HighMem zone: 322048 pages, LIFO batch:31
[Â Â Â 0.000000] Running under secure firmware.
[Â Â Â 0.000000] random: fast init done
r8192 d22772 u65536
[Â Â Â 0.000000] pcpu-alloc: s34572 r8192 d22772 u65536 alloc=16*4096
[Â Â Â 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5
[0] 6 [0] 7
[Â Â Â 0.000000] Built 1 zonelists, mobility grouping on.Â Total
pages: 516928
[Â Â Â 0.000000] Kernel command line: ro
rd.driver.pre=ledtrig-heartbeat,xhci-plat-hcd
root=UUID=d4a4b86d-5e86-4bcb-b79c-2bde6831b7c5 cma=192MB
cpuidle.off=1 LANG=en_US.UTF-8 no_bL_switcher
7, 524288 bytes)
[Â Â Â 0.000000] Inode-cache hash table entries: 65536 (order: 6,
262144 bytes)
[Â Â Â 0.000000] Memory: 1822580K/2074624K available (8168K kernel
code, 1328K rwdata, 3920K rodata, 2048K init, 505K bss, 55436K
reserved, 196608K cma-reserved, 1091584K highmem)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â vectorÂ : 0xffff0000 - 0xffff1000Â Â (Â Â 4 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â fixmapÂ : 0xffc00000 - 0xfff00000Â Â (3072 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â vmalloc : 0xf0800000 - 0xff800000Â Â ( 240 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â lowmemÂ : 0xc0000000 - 0xf0000000Â Â ( 768 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â pkmapÂ Â : 0xbfe00000 - 0xc0000000Â Â (Â Â 2 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â modules : 0xbf000000 - 0xbfe00000Â Â (Â 14 MB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .text : 0x(ptrval) - 0x(ptrval)Â Â (9161 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .init : 0x(ptrval) - 0x(ptrval)Â Â (2048 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .data : 0x(ptrval) - 0x(ptrval)Â Â (1329 kB)
Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â .bss : 0x(ptrval) - 0x(ptrval)Â Â ( 506 kB)
[Â Â Â 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0,
CPUs=8, Nodes=1
[Â Â Â 0.000000] ftrace: allocating 37441 entries in 74 pages
[Â Â Â 0.000000] Hierarchical RCU implementation.
[Â Â Â 0.000000] Â Â Â RCU restricting CPUs from NR_CPUS=32 to
nr_cpu_ids=8.
[Â Â Â 0.000000] Â Â Â Tasks RCU enabled.
[Â Â Â 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16,
nr_cpu_ids=8
[Â Â Â 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[Â Â Â 0.000000] GIC: Using split EOI/Deactivate mode
[Â Â Â 0.000000] GIC physical location is 0x10481000
[Â Â Â 0.000000] Switching to timer-based delay loop, resolution 41ns
[Â Â Â 0.000000] clocksource: mct-frc: mask: 0xffffffff
max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[Â Â Â 0.000007] sched_clock: 32 bits at 24MHz, resolution 41ns,
wraps every 89478484971ns
[Â Â Â 0.000033] genirq: irq_chip COMBINER did not update eff.
affinity mask of irq 49
[Â Â Â 0.006905] Console: colour dummy device 80x30
[Â Â Â 0.007535] console [tty0] enabled
[Â Â Â 0.007603] Calibrating delay loop (skipped), value
calculated using timer frequency.. 48.00 BogoMIPS (lpj=24000)
[Â Â Â 0.007640] pid_max: default: 32768 minimum: 301
[Â Â Â 0.007903] Security Framework initialized
[Â Â Â 0.007927] Yama: becoming mindful.
[Â Â Â 0.007994] SELinux:Â Initializing.
[Â Â Â 0.008199] SELinux:Â Starting in permissive mode
[Â Â Â 0.008297] Mount-cache hash table entries: 2048 (order: 1,
8192 bytes)
1, 8192 bytes)
[Â Â Â 0.009575] CPU: Testing write buffer coherency: ok
[Â Â Â 0.010559] CPU0: thread -1, cpu 0, socket 1, mpidr 80000100
[Â Â Â 0.011506] Setting up static identity map for 0x40300000 -
0x403000a0
[Â Â Â 0.012297] ARM CCI driver probed
[Â Â Â 0.012546] Exynos MCPM support installed
[Â Â Â 0.015526] Hierarchical SRCU implementation.
[Â Â Â 0.022460] EFI services will not be available.
[Â Â Â 0.023397] smp: Bringing up secondary CPUs ...
[Â Â Â 0.024680] CPU1: thread -1, cpu 1, socket 1, mpidr 80000101
[Â Â Â 0.026094] CPU2: thread -1, cpu 2, socket 1, mpidr 80000102
[Â Â Â 0.027452] CPU3: thread -1, cpu 3, socket 1, mpidr 80000103
[Â Â Â 0.028759] CPU4: thread -1, cpu 0, socket 0, mpidr 80000000
[Â Â Â 0.030181] CPU5: thread -1, cpu 1, socket 0, mpidr 80000001
[Â Â Â 0.031561] CPU6: thread -1, cpu 2, socket 0, mpidr 80000002
[Â Â Â 0.032919] CPU7: thread -1, cpu 3, socket 0, mpidr 80000003
[Â Â Â 0.033125] smp: Brought up 1 node, 8 CPUs
[Â Â Â 0.033262] SMP: Total of 8 processors activated (384.00
BogoMIPS).
[Â Â Â 0.033284] CPU: WARNING: CPU(s) started in
wrong/inconsistent modes (primary CPU mode 0x1a)
[Â Â Â 0.033309] CPU: This may indicate a broken bootloader or
firmware.
* Although 8 cores are recognized, the "lscpu" command (and the
"dmesg" snippet) recognizes only the A7 processor.
* The default cpu governor is "ondemand" providing a cpu frequency of
700 MHz for all cores per the output of the first "cpupower
frequency-info" above.
* The cpu governor and frequency can be changed to "performance" and
1300 MHz, respectively by using the command "cpupower frequency-set
--governor performance", but this is not persistent between
reboots.Â To make it persistent between reboots follow this
https://ask.fedoraproject.org/en/question/39964/how-to-permanently-set-cp...
* Note the last two lines in the "dmesg" command.Â There may be
additional code required in the bootloader or firmware to recognize
the A15 processor correctly.Â Does anyone have any ideas here?
Stewart

Hi Stewart,
I don't think lscpu is the best source of cpu related info on this device. You can have a look at the /sys tree, I'm not at my device now but I think it's /sys/bus/cpu. There should be a lot of files with cpu related info there, probably even with the correct core type a7/a15. The system boots on an a7 core, so that's probably what you see with lscpu and dmesg. Not sure about the cpu mode, my guess it's related to kernel and user cpu modes, with the cpu not enabled in the mode the bootloader expects.
The frequency/voltage pairs in dts are limited to 1.3/1.8GHz, so that's the maximum we get for now. I seem to remember frequencies being downscaled from 1.4/2.1GHz, but I'm not sure what was the background.
That being said, when looking at the "current frequency" in /sys, I have the impression the default ondemand governor is behaving as expected, scaling frequency up and down depending on load. Maybe you can try monitoring those files as well? I'll have a look when I have access to the device again.
Regarding the r8152 driver, did you just reboot after making the kernel option changes, or shutdown and remove power completely? The first seems to retain part of the old config, the latter will be a full reset and should behave correctly.
Best regards,
Vince
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Vince Geze

2018-08-30 09:30:33 UTC